Key Takeaways: Chapter 18 — The NISQ Era — Noisy Intermediate-Scale Quantum Computers and the Algorithms Designed for Imperfect Hardware
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NISQ = Noisy Intermediate-Scale Quantum. Current devices have 50–1,000+ noisy qubits with limited coherence and gate fidelity, precluding full error correction.
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The NISQ design philosophy centers on shallow circuits, hybrid classical-quantum optimization loops, and error mitigation (not correction).
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Quantum volume provides a single-number benchmark that captures the effective computational power of a device, accounting for qubit count, connectivity, and error rates.
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Error mitigation (ZNE, PEC, readout mitigation) reduces the impact of noise on expectation values but does not correct individual errors. It's essential for NISQ computing but insufficient for deep circuits.
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Circuit knitting enables running larger circuits by decomposing them into smaller subcircuits, but incurs an exponential sampling overhead.
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Variational quantum algorithms (VQE, QAOA, QML) are the dominant NISQ paradigm, trading circuit depth for classical optimization.
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Barren plateaus threaten the scalability of variational algorithms — gradient variance can vanish exponentially with the number of qubits, making optimization impossible at scale.
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Noise grows exponentially with circuit depth, making error mitigation essential but ultimately limited in what it can achieve.
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The NISQ era is a stepping stone, not the end goal. Progress toward fault tolerance continues in parallel with NISQ algorithm development.
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Quantum advantage is problem-specific: demonstrating advantage on random circuit sampling does not imply advantage on practical problems.
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We're at the beginning: the path from current NISQ devices to useful quantum computing involves hardware scaling, error correction, and algorithmic innovation — all active areas of research.