Case Study: The Wiring Problem — Why Scaling Isn't Just More Qubits

Executive Summary

A million-qubit superconducting processor is usually discussed as a fabrication challenge. It is at least as much a refrigeration and cabling challenge, and the numbers make that immediate: at today's per-qubit wiring overhead, a million qubits would require more coaxial cable than fits through the refrigerator, and would deposit more heat at the mixing chamber than any dilution refrigerator can remove by four orders of magnitude.

This case study works the thermal and cabling budget, identifies which constraint binds first, and evaluates the three escape routes the field is pursuing.

Skills applied

• Computing cryogenic heat loads from control wiring (§26.13).
• Understanding dilution-refrigerator cooling power by stage.
• Evaluating multiplexing and cryo-CMOS as scaling strategies.
• Recognizing engineering constraints that qubit-count roadmaps omit.

Phase 1: What one qubit costs in wiring

A typical transmon needs:

With frequency-multiplexed readout, ~8 qubits share a readout pair. So roughly 2.25 lines per qubit — call it 2 for estimation.

Two and a quarter million coaxial cables, each a few millimetres in diameter, entering a refrigerator whose bore is perhaps 500 mm. Geometrically impossible by three orders of magnitude before considering anything thermal.

Phase 2: The thermal budget

Every line carries heat from room temperature down. Attenuators at each stage suppress thermal noise from above, and the attenuation itself dissipates power.

Dilution refrigerator cooling power by stage:

Twenty microwatts. That is the entire budget at base temperature.

A well-engineered drive line contributes roughly 1 μW at the mixing chamber (conducted heat plus attenuator dissipation). So:

$$\frac{20\,\mu W}{1\,\mu W \text{ per line}} = \textbf{20 lines}$$

Real systems do better through careful thermalization and by placing most attenuation at warmer stages — current large systems support a few thousand lines — but the scaling is brutal:

The binding constraint. Cooling power at 10 mK, not fabrication yield, is what stops a monolithic million-qubit superconducting processor. Refrigerators have grown, but cooling power scales with the size and cost of the dilution unit, not exponentially.

Phase 3: Escape route one — cryogenic control electronics

Move the control electronics from room temperature into the refrigerator, at the 4 K stage where cooling power is ~1.5 W.

The idea: instead of one coaxial line per qubit from 300 K, run a few digital lines to a cryo-CMOS chip at 4 K that synthesizes the microwave pulses locally.

The constraint: every milliwatt dissipated at 4 K counts against 1.5 W. Current cryo-CMOS controllers dissipate on the order of a few mW per qubit, giving perhaps a few hundred qubits per 4 K stage. Getting to millions requires per-qubit power in the microwatt range — a factor of ~1,000 improvement.

Status: demonstrated at small scale by several groups. The power-per-qubit figure is the number to watch.

Phase 4: Escape route two — modular architectures

Rather than one enormous refrigerator, use many smaller ones linked by quantum interconnects.

The idea: each module holds ~1,000 qubits in its own fridge; modules are entangled via microwave-to-optical transduction and photonic links.

The constraint: transduction efficiency. Converting a microwave photon to an optical one and back currently succeeds a few percent of the time, and inter-module entanglement rates and fidelities lag intra-module gates by orders of magnitude.

Status: an active research area and the approach most large roadmaps assume for reaching millions of qubits. Note that it changes the error-correction problem too — inter-module links are slow and lossy, so codes must tolerate a two-tier connectivity structure.

Phase 5: Escape route three — fewer lines per qubit

Reduce the wiring requirement itself:

• Frequency multiplexing for control as well as readout — drive many qubits on one line at different frequencies. Limited by frequency crowding.
• Fixed-frequency qubits eliminate flux lines entirely, at the cost of losing tunability (and thus the TLS-avoidance fix from the previous case study — a real trade).
• Photonic delivery of control signals down optical fibre, which conducts far less heat than coax, with conversion at the cold stage.

Each buys a factor of a few. Combined with cryo-CMOS and modularity, these are the ingredients of every credible million-qubit plan.

Phase 6: Reading roadmaps with this in mind

When a roadmap promises $N$ qubits by year $Y$, ask:

1. In how many refrigerators? A million qubits across a thousand modules is a different claim than a million in one.
2. What is the wiring plan? Coax per qubit does not reach $10^4$.
3. Where does the control electronics sit? Room temperature, 4 K, or on-chip?
4. What is the per-qubit heat load at base temperature? This single number determines the ceiling.
5. If modular, what are the inter-module rate and fidelity? These set whether error correction spans modules.

These questions are answerable and rarely asked, and they distinguish a roadmap from an aspiration.

Discussion Questions

1. Cooling power at 10 mK is ~20 μW. Explain why this is a hard physical limit rather than an engineering choice.
2. Cryo-CMOS needs ~1,000× power reduction. Compare that against historical CMOS power scaling — is it plausible?
3. Fixed-frequency qubits remove flux lines but lose TLS-avoidance retuning. Evaluate the trade.
4. Modular architectures change the error-correction problem. What code properties would a two-tier connectivity structure favour?

Your Turn: Extensions

• Compute the total heat load for 5,000 qubits at 0.8 μW per line and compare against the largest commercial fridge.
• Research a specific cryo-CMOS demonstration and note its power per qubit.
• Estimate the coax cross-sectional area for 10,000 lines and compare against a refrigerator bore.
• Find a vendor roadmap and answer all five Phase 6 questions from public information.

Key Takeaways

• Each superconducting qubit needs roughly two coaxial lines, and a million qubits would need millions of cables through a half-metre bore.
• Cooling power at the 10 mK stage is ~20 μW, which caps line count long before fabrication becomes the limit.
• Cryogenic control electronics move the problem to the 4 K stage and need ~1,000× power reduction per qubit to scale.
• Modular architectures with photonic interconnects are the assumed route to millions, gated on microwave-to-optical transduction efficiency.
• Evaluate roadmaps on refrigerator count, wiring plan, control-electronics location, per-qubit heat load, and inter-module link quality.