Self-Assessment Quiz: Superconducting Qubits

Twenty questions on transmons, Josephson junctions, control and readout, and the engineering realities of the leading platform. Aim for 16+.


Question 1

The nonlinear element that makes a superconducting circuit behave as a qubit is:

A) A resistor B) A Josephson junction C) A capacitor D) An inductor

Question 2

Nonlinearity is essential because:

A) It makes the energy levels unequally spaced, so a specific transition can be addressed B) It increases speed C) It reduces cost D) It enables measurement

Question 3

A transmon reduces charge noise sensitivity by:

A) Operating at large $E_J/E_C$ ratio B) Using more junctions C) Running colder D) Increasing anharmonicity

Question 4

The trade-off of that choice is:

A) Reduced anharmonicity, so faster pulses risk leakage to $|2\rangle$ B) Higher cost C) Shorter $T_1$ D) No trade-off

Question 5

Typical transmon operating frequency is around:

A) 5 GHz B) 5 MHz C) 5 THz D) 5 Hz

Question 6

Superconducting qubits operate at roughly:

A) 10 mK B) 4 K C) 77 K D) Room temperature

Question 7

That temperature is required because:

A) $k_BT$ must be well below the qubit energy $\hbar\omega$ to keep it in the ground state B) Wires melt otherwise C) Lasers need it D) It reduces cost

Question 8

Single-qubit gates are performed by:

A) Resonant microwave pulses B) Laser pulses C) Magnetic field reversal D) Measurement

Question 9

Readout is typically performed via:

A) A dispersively coupled resonator whose frequency shifts with qubit state B) Direct voltage measurement C) Photon counting D) Electron microscopy

Question 10

DRAG pulse shaping is used to:

A) Suppress leakage to the $|2\rangle$ state B) Speed up readout C) Cool the qubit D) Increase $T_1$

Question 11

Typical two-qubit gate times are:

A) ~1 ns B) ~100–500 ns C) ~100 μs D) ~1 ms

Question 12

The virtual-$Z$ gate is implemented by:

A) Shifting the phase of subsequent pulses in software — costing zero time B) A microwave pulse C) A flux pulse D) A measurement

Question 13

The main advantage of superconducting qubits is:

A) Fast gates and semiconductor-style fabrication B) Longest coherence times of any platform C) Room-temperature operation D) All-to-all connectivity

Question 14

Their main disadvantages include:

A) Short coherence relative to ions, limited connectivity, frequency crowding, and dilution-refrigerator scaling B) Slow gates C) Inability to entangle D) No readout method

Question 15

Frequency crowding refers to:

A) Nearby qubits with overlapping frequencies causing crosstalk and addressing errors B) Too many qubits C) Cable congestion D) Readout bandwidth

Question 16

True or false: Superconducting qubits are identical to one another as manufactured.

Question 17

True or false: Coherence times have improved by several orders of magnitude since 1999.

Question 18

True or false: Every physical qubit needs its own room-temperature control electronics chain.

Question 19

Short answer. Explain the transmon's central design compromise.

Question 20

Short answer. Why is wiring, rather than qubit count, often cited as the scaling bottleneck?


Answer Key

Q Ans Note
1 B A nonlinear, dissipationless inductor — the only such element available.
2 A A harmonic oscillator has equally spaced levels, so a pulse driving $0\to1$ also drives $1\to2$. Nonlinearity isolates a two-level subspace.
3 A Large $E_J/E_C$ flattens the charge dispersion exponentially.
4 A Anharmonicity falls as $(E_J/E_C)^{-1/2}$, so the $|2\rangle$ level is only ~200–300 MHz away; fast pulses have enough bandwidth to excite it.
5 A 4–8 GHz — microwave, matching available control electronics.
6 A Base plate of a dilution refrigerator, ~10–20 mK.
7 A At 5 GHz, $\hbar\omega/k_B \approx 240$ mK, so 10 mK gives a thermal excited-state population under $10^{-10}$.
8 A Amplitude and phase of the pulse set the rotation angle and axis.
9 A Dispersive readout: the resonator's frequency depends on the qubit state, so a probe tone's phase reveals it.
10 A Derivative Removal by Adiabatic Gate — adds a quadrature component cancelling leakage.
11 B Roughly 10× slower than single-qubit gates, and the dominant error source.
12 A The virtual-$Z$ trick: $R_z$ is free, which shapes the whole native gate set (Ch. 6).
13 A Nanosecond-to-microsecond gates and lithographic fabrication borrowed from the semiconductor industry.
14 A All four are real constraints; connectivity and frequency crowding drive most compilation overhead.
15 A With finite fabrication precision and a limited frequency band, qubits collide in frequency, causing crosstalk and unaddressable pairs.
16 False Junction fabrication has percent-level variation, so every qubit has a different frequency and every device needs individual calibration. This is why "calibration drift" is a per-device, per-day concern.
17 True From ~1 ns in the 1999 Nakamura charge qubit to >100 μs today — roughly five orders of magnitude, driven by better materials, geometry, and the transmon design itself.
18 True (today) Each qubit needs microwave drive lines and readout chains, mostly at room temperature. This is precisely the wiring bottleneck; cryogenic control electronics and frequency multiplexing are the proposed escapes.
19 Increasing $E_J/E_C$ suppresses charge noise exponentially, which is why transmons have long coherence. But anharmonicity falls only as a power law, so the $|1\rangle\to|2\rangle$ transition sits just 200–300 MHz from $|0\rangle\to|1\rangle$. Fast pulses have bandwidth comparable to that gap and cause leakage. The transmon trades a small, manageable leakage problem for an enormous coherence gain — and DRAG shaping manages the residual.
20 Each qubit needs at least one drive line and shares readout lines; those lines run from room temperature into a ~10 mK stage, and each carries heat. A dilution refrigerator's cooling power at base is on the order of microwatts, so the number of lines is limited by thermal budget, not by space. At thousands of qubits the wiring, connectors, and heat load dominate the engineering — hence cryogenic CMOS control, frequency-multiplexed readout, and photonic interconnects on every serious roadmap.