Case Study: Building an Error Budget for a Real Circuit

Executive Summary

"The device has 99.3% two-qubit gate fidelity" is a specification. "This circuit will return a usable answer" is a prediction, and getting from one to the other requires an error budget: every error channel, weighted by how often the circuit exposes itself to it.

This case study builds that budget for a 12-qubit, 180-gate circuit, predicts the fidelity, measures it, and finds the prediction 8 points high. Chasing the discrepancy surfaces two error sources that no vendor specification sheet lists — and that is the real lesson: the budget's value lies as much in what it fails to explain as in what it predicts.

Skills applied

• Enumerating error channels and their exposure in a circuit (§22.7).
• Combining independent error contributions.
• Distinguishing idle-time decoherence from gate error.
• Using budget discrepancies diagnostically.

Phase 1: The circuit and the device

Circuit: 12 qubits, 180 two-qubit gates, 240 single-qubit gates, depth 62, total duration 31 μs including readout.

Device specification:

Phase 2: The naive budget

Multiply survival probabilities:

$$F \approx (1-\epsilon_{2q})^{180}(1-\epsilon_{1q})^{240}(1-\epsilon_{ro})^{12}$$

$$= (0.9938)^{180}(0.99979)^{240}(0.987)^{12}$$ $$= 0.325 \times 0.951 \times 0.855 = \mathbf{0.264}$$

Predicted fidelity: 26.4%. Note immediately that two-qubit gates contribute the bulk of the loss (0.325 alone), readout is second, and single-qubit gates are nearly free — the standard hierarchy.

Phase 3: Add idle decoherence

The naive budget assumes qubits only decohere while being operated on. They decohere constantly.

With depth 62 and a circuit duration of 31 μs, an average qubit is idle for a substantial fraction. Estimating idle time per qubit at ~18 μs (circuit duration minus its own gate time):

$$F_{\text{idle}} \approx e^{-t_{\text{idle}}/T_2} = e^{-18/94} = 0.826 \text{ per qubit}$$

Applied across 12 qubits this is not a simple product — decoherence on one qubit does not always destroy the whole observable — but for a global observable a reasonable approximation weights it by the number of qubits the observable touches. For a 2-qubit observable:

$$F_{\text{idle,eff}} \approx (0.826)^2 = 0.682$$

Revised prediction: $0.264 \times 0.682 = \mathbf{0.180}$.

Idle time is usually the single largest omission from naive budgets. A shallow-looking circuit that spans a long duration because of slow readout or scheduling gaps loses far more than its gate count suggests.

Phase 4: Measure it

Hardware result over 8,192 shots, using a mirror-circuit protocol (run the circuit, then its inverse, and measure the probability of returning to the initial state):

Measured fidelity: 0.098.

Predicted 0.180, measured 0.098 — the budget is high by a factor of 1.8, or 8 percentage points.

Phase 5: Chase the discrepancy

Four candidate explanations, tested in order of cheapness.

1. Worst-qubit versus median. The budget used median error rates. The circuit's routing put 34 of its 180 two-qubit gates on the worst pair ($1.4\times10^{-2}$). Recomputing with per-gate rates:

$$(0.9938)^{146}(0.986)^{34} = 0.402 \times 0.618 = 0.248 \text{ (vs. } 0.325)$$

Revised prediction: 0.137. Explains about half the gap.

2. Crosstalk. Simultaneous gates on neighbouring qubit pairs interact. Measuring the same circuit with gates deliberately serialized (no simultaneity) gives fidelity 0.118 — higher than the parallel version's 0.098, confirming ~2% loss from crosstalk. Vendor specifications characterize gates in isolation, so this contribution is systematically absent from published numbers.

3. Coherent error accumulation. Randomized benchmarking on the used qubits gives an error per Clifford of $5.1\times10^{-3}$, while interleaved RB on the two-qubit gate gives $6.4\times10^{-3}$ — consistent with the spec. But a purity benchmark (measuring how much of the error is unitary versus depolarizing) shows ~20% of the error is coherent, which accumulates quadratically rather than linearly over a structured circuit.

4. Leakage. Transmons have higher levels; population leaking to $|2\rangle$ is neither corrected nor detected by the budget. Measuring leakage population after the circuit gives ~1.5%.

Final accounting:

Against measured 0.098 — agreement within experimental uncertainty.

Phase 6: What to do with a budget

As a design tool. The budget says two-qubit gates and idle time dominate. That prioritizes: reduce two-qubit gate count, avoid the worst qubit pairs, and compress the schedule. Optimizing single-qubit gates would be wasted effort.

As a diagnostic. A budget that under-predicts measured fidelity means an unmodelled error source. Chasing it found crosstalk, coherent accumulation, and leakage — none of which appear on a specification sheet. The gap between budget and measurement is where the physics is.

As a go/no-go decision. At 10% fidelity, this circuit's results are dominated by noise. The budget told us that before we spent device time — which is the cheapest possible way to learn it.

Discussion Questions

1. Idle decoherence was the second-largest term and is absent from naive budgets. What circuit property makes it large?
2. Vendor specs characterize gates in isolation. Argue whether that is dishonest, unavoidable, or both.
3. Coherent error accumulates quadratically. Show how 20% coherent error changes the scaling for a 180-gate circuit.
4. The budget under-predicted by 1.8×. At what discrepancy would you suspect the measurement rather than the model?

Your Turn: Extensions

• Build an error budget for a circuit of your own and compare against a mirror-circuit measurement.
• Measure the crosstalk contribution by comparing parallel against serialized execution.
• Run purity benchmarking to estimate the coherent fraction of your device's error.
• Recompute a budget using per-gate rather than median error rates and quantify the difference.

Key Takeaways

• Multiply survival probabilities across every error channel, weighted by the circuit's actual exposure to each.
• Two-qubit gates and idle-time decoherence dominate; single-qubit gates are usually negligible.
• Use per-gate error rates, not medians — routing frequently places many gates on the worst pair.
• Crosstalk, coherent error accumulation, and leakage do not appear on specification sheets and can account for a factor of two.
• The discrepancy between budget and measurement is diagnostic; chase it rather than tuning the model to fit.