Further Reading: Hardware-Aware Programming

Tagged Tier 1 (confident it exists and recommended) and Tier 2 (real and worth seeking, but verify the current version or URL).

The data you must read

The backend Target API. backend.target["ecr"], .error, .duration, and the per-qubit properties. §29.4's entire lesson is that the coupling map and the Target answer different questions, and most people only ever read the first. Tier 1.
Qiskit's CouplingMap documentation, specifically that it is directed and neighbors() returns successors. One sentence, and getting it wrong made 29 qubits appear to have no neighbours while drafting §29.1. Tier 1.
VF2Layout and VF2PostLayout documentation and source. What their scoring function actually includes — which is the answer to why a hand-built survival product loses to them. Tier 1.
IBM Quantum's backend calibration pages, for a real device. Look at the spread, and look at how much it moves week to week. Chapter 30's subject, and the reason a layout chosen last month is not a layout chosen today. Tier 1.

On connectivity and architecture

IBM's papers and technical notes on the heavy-hex lattice. Why lower connectivity was chosen deliberately: reduced crosstalk and frequency collisions, at the cost of routing. Read it to understand that the constraint is a trade, not a shortcoming. Tier 1.
Chapter 17's material on trapped ions and neutral atoms, and the primary literature behind it. Trapped ions have all-to-all connectivity, so §29.2's overhead table collapses to 1.0 everywhere — and they pay elsewhere, in gate speed. The clearest way to see that this chapter's advice is architecture-specific. Tier 1.
Literature on qubit mapping and routing algorithms — SABRE (which Qiskit uses), and the token-swapping formulation. Worth reading once so you know what the transpiler is doing when it spends 102 gates on your behalf. Tier 2.

On ansatz design

This is where the shape decision actually gets made.

Kandala et al., "Hardware-efficient variational quantum eigensolver for small molecules and quantum magnets" (2017), Nature 549, 242. The paper that named the hardware-efficient ansatz, and it is explicit that the entangling pattern should follow the device's connectivity. This chapter is a measurement of that paper's central claim. Tier 1.
Sim, Johnson, and Aspuru-Guzik on expressibility and entangling capability of parameterized circuits (2019). Quantifies what §29.6 hand-waves: how much expressibility you give up by restricting the entanglement pattern. Read this before deciding the trade is obviously worth it. Tier 1.
Chapter 16's barren-plateau reading list, and Chapter 24's ADAPT-VQE reference (Grimsley et al., 2019). Both argue for problem-informed rather than generic ansätze, which is the same direction this chapter arrives at from hardware. Tier 1.
Literature on QAOA graph embedding, for the case where the interaction graph is fixed by the problem but the vertex-to-qubit assignment is not. Exercise 29.24's subject. Tier 2.

On qubit reuse and dynamic circuits

Qiskit's dynamic circuits documentation — mid-circuit measurement, reset, and if_test. Chapter 9's material, applied here as a width-for-depth trade. Tier 1.
Work on qubit-reuse compilation (circuit-knitting and measurement-based reuse). Automated versions of Exercise 29.26. Genuinely useful when qubit count rather than depth is binding. Tier 2 — active.

Backward references

Chapter 12 — the 288× error spread and the 0.9727-versus-0.2844 layout scores that §29.4 pushes to their limit.
Chapter 17 — connectivity across hardware modalities, and the 3.18× routing overhead measured there.
Chapter 24 — the ansatz whose shape this chapter is choosing, and the shot budget that binds before expressibility does.
Chapter 28 — what optimization can do, which this chapter measures against.

Forward references

Chapter 30 — where the calibration numbers come from, and how much they move.
Chapter 31 — the level below the gate, where the error rates this chapter reads are ultimately set.

Where to go next. If one thing: Kandala et al. (2017). It introduced the hardware-efficient ansatz and stated the connectivity-matching principle explicitly, and this chapter is essentially a measurement of how much that principle is worth on a modern device.

If two: add Sim, Johnson, and Aspuru-Guzik on expressibility. §29.6 raises the trade and settles it by measurement on one problem; that paper is how you reason about it in general, and it is the honest counterweight to this chapter's enthusiasm for cheap ansätze.

Then Chapter 30, which asks where all these error rates came from and how much you should trust them.