Chapter 2 Quiz: Numbers in the Machine

18 questions covering binary arithmetic, two's complement, IEEE 754, flags, and endianness.

Multiple Choice

1. The 8-bit two's complement representation of -1 is:

A) 0x80 B) 0xFE C) 0xFF D) 0x01

2. After executing mov eax, 0xFFFFFFFF followed by add eax, 1, what is the value of EAX and which flags are set?

A) EAX = 0x100000000, CF=1, OF=0 B) EAX = 0x00000000, CF=1, OF=0 C) EAX = 0x00000000, CF=0, OF=1 D) EAX = 0xFFFFFFFF, CF=1, OF=1

3. What is the difference between the jl and jb instructions?

A) There is no difference; they are synonyms B) jl is for signed comparisons (uses SF and OF); jb is for unsigned comparisons (uses CF) C) jl is for 32-bit registers; jb is for 64-bit registers D) jl jumps if the result is less than zero; jb jumps if the result is less than one

4. The MOVSX rax, al instruction:

A) Copies the 8-bit value in AL to RAX, zeroing the upper 56 bits B) Copies the 8-bit value in AL to RAX, filling the upper 56 bits with the value of bit 7 of AL C) Copies the 8-bit value in AL to RAX, filling the upper 56 bits with 1s D) Copies RAX to AL

5. Which of the following decimal values CANNOT be represented exactly as an IEEE 754 double-precision floating-point number?

A) 0.5 B) 0.25 C) 0.1 D) 2.0

6. On an x86-64 (little-endian) machine, the value 0x01020304 is stored at address 0x1000. What byte is at address 0x1001?

A) 0x01 B) 0x02 C) 0x03 D) 0x04

7. The BSWAP eax instruction with EAX = 0x01020304 produces:

A) 0x04030201 B) 0x01020304 (unchanged) C) 0xFEFDFCFB D) 0x00000000

8. After xor eax, eax, which of the following flags is guaranteed to be set?

A) CF B) OF C) ZF D) SF

9. The Overflow Flag (OF) is set to 1 by the instruction add eax, 1 when EAX is initially:

A) 0xFFFFFFFF B) 0x7FFFFFFF C) 0x00000000 D) 0x80000000

10. You need to read the current value of RFLAGS into RAX. Which instruction sequence achieves this?

A) mov rax, rflags B) pushfq followed by pop rax C) mov rax, cr0 D) lahf (loads flags into AH)

11. The IEEE 754 representation of negative zero (-0.0) is:

A) All bits zero B) Sign bit = 1, all other bits zero C) All bits one D) Negative zero cannot be represented in IEEE 754

12. What is the result of neg rax when RAX contains 0x8000000000000000 (INT64_MIN)?

A) 0x7FFFFFFFFFFFFFFF (INT64_MAX) B) 0x0000000000000001 (+1) C) 0x8000000000000000 (unchanged — INT64_MIN negated overflows back to itself) D) The operation is undefined

True/False

13. A right shift of a two's complement negative number by 1 bit using the SAR (arithmetic right shift) instruction always divides the number by 2, rounding toward negative infinity.

True / False

14. The Carry Flag (CF) and the Overflow Flag (OF) can both be set after the same ADD instruction.

True / False

15. IEEE 754 guarantees that NaN == NaN evaluates to true.

True / False

Short Answer

16. Explain in one paragraph why x86-64's fixed-width arithmetic is described as "the hardware is always correct — it's the programmer's interpretation that might be wrong." Use an 8-bit example involving the value 0xC8 to illustrate.

17. Given the following C code:

unsigned int a = 4294967295;  // 0xFFFFFFFF
unsigned int b = 1;
unsigned int c = a + b;

a) What value does c contain? Is this a bug or defined behavior in C for unsigned types? b) After the corresponding assembly add eax, ebx, which flags are set? c) If the types were int instead of unsigned int, would the C behavior be the same? Explain.

18. The following assembly code is supposed to implement abs(x) — return the absolute value of the signed 64-bit integer in RDI. Identify the bug:

abs_value:
    mov  rax, rdi
    test rdi, rdi
    jns  .already_positive
    neg  rax
.already_positive:
    ret

What happens when rdi contains 0x8000000000000000 (INT64_MIN, which is -9223372036854775808)? What flags does neg rax set in this case? What should a correct implementation do instead?