Chapter 39 Quiz: Beyond Assembly

Instructions: Choose the best answer. ⭐ marks questions with answers in Appendix B.


Question 1 ⭐ In the LLVM compiler pipeline, what is LLVM IR?

A) The final x86-64 assembly output B) A target-independent, typed intermediate representation in Static Single Assignment form, used for optimization passes C) The parsed Abstract Syntax Tree from source code D) A textual representation of machine code bytes


Question 2 What is "Static Single Assignment" (SSA) form in a compiler IR?

A) Each variable is assigned exactly once; new "versions" are created for each reassignment B) Variables can only be assigned to static (global) memory locations C) The IR is never modified after creation D) Functions can only have a single assignment statement


Question 3 ⭐ Why does the compiler emit lea eax, [rdi + rdi*2] for x * 3?

A) imul is not supported in 32-bit mode B) LEA computes the address expression in one instruction at lower latency than imul for small integer multipliers C) The compiler made a mistake; imul eax, edi, 3 would be identical D) LEA works on both 32-bit and 64-bit values but imul does not


Question 4 In graph-coloring register allocation, two variables "interfere" if:

A) They have the same type B) They are both assigned on the same line of source code C) They are both live (needed) at the same program point D) One is used as an argument to a function that uses the other


Question 5 ⭐ To execute JIT-generated machine code on Linux, after writing the code bytes to memory, what must happen?

A) Call execve() with the memory address as the program path B) Call mprotect(mem, size, PROT_READ | PROT_EXEC) to make the page executable (removing write permission) C) Call msync() to flush the instruction cache D) Map the memory as a shared file using shm_open()


Question 6 WebAssembly is a stack machine. For the expression a + b, the WASM instructions are:

A) add a, b B) local.get $a; local.get $b; i32.add C) push a; push b; add D) i32.add $a, $b


Question 7 ⭐ What property of WASM prevents it from executing code at an arbitrary memory address (like a ROP gadget)?

A) WASM has no jmp instruction B) WASM control flow can only branch to statically declared labels; all indirect branches are validated against a function table C) WASM is interpreted, never compiled to native code D) WASM memory is encrypted


Question 8 RISC-V's ecall instruction is equivalent to which instruction on x86-64?

A) int 0x80 B) syscall C) call D) hlt


Question 9 ⭐ The RISC-V extension letter A in RV64GC stands for:

A) Arithmetic (multiply and divide) B) Atomic (load-reserved/store-conditional and AMO instructions) C) ARM compatibility mode D) Address-size extension to 64 bits


Question 10 Which register in RISC-V always reads as zero, similar to x86-64's xor eax, eax pattern?

A) x0 (zero) B) x1 (ra) C) x2 (sp) D) x31 (t6)


Question 11 ⭐ In NVIDIA GPU execution, a "warp" is:

A) A single thread with SIMD extensions B) A group of 32 threads that execute the same instruction simultaneously (SIMT) C) A hardware thread that runs independently D) The equivalent of a CPU process on the GPU


Question 12 CUDA PTX is to SASS as:

A) Assembly is to machine code B) LLVM IR is to x86-64 assembly C) C is to LLVM IR D) Python is to CPython bytecode


Question 13 ⭐ Why is RISC-V considered politically significant beyond its technical design?

A) RISC-V has better instruction encoding than ARM or x86-64 B) RISC-V is open and royalty-free, allowing any entity to build processors without licensing from Intel or ARM C) RISC-V was designed by academic institutions with public funding D) RISC-V is the only architecture supported by all major compilers


Question 14 The WASM security model guarantees that WASM code running in one browser tab cannot read memory from another tab. Which property primarily enforces this?

A) Each tab runs in a separate operating system process B) WASM linear memory is a bounded array; all accesses are bounds-checked; no pointer arithmetic can reach outside it C) WASM uses memory encryption D) Browsers use hardware virtualization for each tab


Question 15 ⭐ What does WASI (WebAssembly System Interface) add to WASM?

A) A faster JIT compiler for server-side WASM B) A standard interface for WASM modules to call OS services (file I/O, network, etc.) portably on any platform C) Support for multi-threading in WASM D) Direct access to GPU acceleration from WASM


Question 16 In LLVM, what does an optimization pass do?

A) Parses source code into the AST B) Translates IR to machine-specific assembly C) Transforms the IR to a more efficient form (e.g., constant folding, dead code elimination, inlining) D) Links object files into an executable


Question 17 ⭐ What is the key architectural difference between RISC-V's calling convention and x86-64's System V ABI for function arguments?

A) RISC-V passes arguments on the stack by default; x86-64 uses registers B) RISC-V uses registers a0-a7 (x10-x17) for the first 8 arguments; x86-64 uses only 6 registers (rdi, rsi, rdx, rcx, r8, r9) C) RISC-V has no callee-saved registers; x86-64 has many D) RISC-V arguments are passed in reverse order compared to x86-64


Question 18 Near-memory computing (Processing-In-Memory) aims to:

A) Cache more data in the CPU's L3 cache B) Move computation closer to where data is stored in DRAM, reducing memory bandwidth bottlenecks C) Process memory addresses in hardware before the CPU uses them D) Compress memory contents before transferring them to the CPU


Question 19 ⭐ An LLVM IR loop br label %loop_body that branches back to itself is equivalent to:

A) A jmp to the top of the loop in assembly B) A function call to the loop body C) A call to the loop function with ret at the bottom D) An infinite recursion


Question 20 The sentence "WASM → native via JIT (how browsers run it)" means:

A) Browsers interpret WASM instructions one at a time B) Browsers convert WASM binary format to JavaScript before execution C) Browsers compile WASM to machine code at runtime (x86-64, ARM64, etc.) for efficient execution D) Browsers send WASM to a cloud service for native execution